The future of AI computing is light, not electrons. Q.ANT is building photonic processing systems that compute with light – delivering a scalable, energy-efficient alternative to transistor-based architectures for next-generation AI and HPC applications.
As Senior Photonics Packaging Engineer (f/m/d), you will lead the specification, development, and verification of high-density photonic packaging solutions that integrate photonic integrated circuits (PICs), light sources, photodetectors, and analog circuitry into production-ready modules. You'll be the technical authority ensuring that supplier-delivered modules meet stringent optical, electrical, thermal, and mechanical requirements through precise definition of technical requirements, contractual agreements, and supplier project management.
What makes this role unique:High complexity: Developing novel high-density photonic packaging concepts that simultaneously address thermal management, optical alignment, RF signal integrity, and manufacturability – an area with few industry precedentsStrategic freedom: Broad autonomy to define requirements, select suppliers, and design technical strategies within strategic goals and budgetary limitsDecision authority: Direct influence on supplier relationships, product architecture decisions, and program economics
innovation mandate: Implementation of at least one new packaging material, process, or architecture annually that becomes differentiating IP for the companyReal-world impact: Your work directly enables technology already deployed in production at world-leading institutions like the Leibniz Supercomputing Centre
Within your first 18-24 months, you will:Achieve leading-edge integration density and performance through innovative packaging architectures that enable our photonic processors to deliver up to 30x energy efficiency vs. conventional systemsMinimize integration risks and rework through rigorous supplier verification and quality assuranceContribute to competitive advantage by accelerating time-to-market and optimizing cost-performance trade-offs in the rapidly scaling photonic computing market
Key responsibilities:Cross-functional leadership: Coordinate internal R&D, system engineering, manufacturing, and test teams to align packaging solutions with overall product architectureSupplier engagement & interface role: Act as the primary point of contact for suppliers, ensuring alignment on technical goals, schedules, and deliverables, including contract management and negotiationProject control: Plan and oversee multi-party R&D projects, tracking milestones, budgets, and risks, while ensuring deliverables are verified and integrated into final systemsTechnical specification: Define complete packaging requirements, including optical coupling techniques, thermal management strategies, RF signal integrity, and hermetic sealing methodsQuality assurance: Ensure supplier quality ratings maintain ≥95% on-time delivery with zero critical defects, and packaging costs remain within ±5% of budgeted targets
Education & Experience:
More than 5 years of experience in hybrid packaging, photonics assembly, optoelectronic integration, or related high-density interconnect technologiesProven track record in managing supplier-led R&D and packaging projects, from requirements definition through to integration and validationHands-on experience with PICs, laser sources, photodetectors, analog electronics, and mixed-signal integrationMaster's or PhD in Photonics, Optoelectronics, Electrical Engineering, Physics, or a related fieldDeep Technical Expertise in:
Optical coupling techniques (butt-coupling, lens coupling, fiber array integration)Thermal management strategies for high-power photonic devicesUnderstanding and enhancement of RF signal integrity for highest performance in different high density interconnectsPackaging material science (polymers, ceramics, metals) and hermetic sealing methodsRelevant standards for reliability and environmental testing (e.g., Telcordia, JEDEC)Tools & Processes:
Familiarity with CAD tools for photonics/electronics packaging, optical simulation software, and statistical process control
Leadership & Coordination Skills:
Exceptional ability to lead cross-functional teams across R&D, system engineering, manufacturing, and test domainsSkilled in negotiation and contract management with external suppliers and R&D partnersStrong systems thinking to balance optical, electrical, thermal, and mechanical requirements simultaneouslyExcellent communication skills with the ability to translate complex technical trade-offs to management and stakeholdersLanguages:
Fluent in English; German or other European language beneficialPreferred Qualifications:
Experience with photonic integrated circuit (PIC) packaging for AI or HPC applicationsKnowledge of high-speed digital interfaces and their integration with photonic systemsFamiliarity with scaling systems from prototype to volume productionUnderstanding of supply chain management and material supplier ecosystems in photonics
Make impact at scale: Help solve one of computing's biggest challenges—making growing demand in compute and sustainability go hand in handWork on the leading edge: Photonic AI acceleration technologies that will define the next decade of computing - already validated in production HPC environmentsOwn your work from day one: Broad autonomy and decision authority with direct impact on product success and the future of AI infrastructureFast-track your growth: Work on challenges with few industry precedents—every problem you solve becomes new institutional knowledge and potentially industry-defining IPWorld-class team: Collaborate alongside a passionate, international, cross-functional team of experts in photonics, processor design, and AI systemsDirect access to leadership: Work closely with the company's founders, including CEO Dr. Michael Förtsch, and advisory board members who shaped the semiconductor industry (ARM, Intel, Infineon)Collaborative culture: Innovative work environment that values technical excellence, open communication, and pragmatic problem-solvingBe part of history: Join at the inflection point where photonic computing transitions from research to mainstream—your contributions will shape this transformation
We're looking for a technical leader who gets energized by developing novel photonic packaging solutions, managing supplier partnerships, and driving innovations that enable production systems to transform AI computing already today.
Ready to shape the future of photonic integration?
We are looking forward to receiving your application!
Q.ANT is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
Who we are and what we do
Q.ANT is a photonic deep-tech scale-up developing photonic processing solutions that compute natively with light and deliver a scalable alternative to transistor-based systems. Its Light Empowered Native Arithmetics (LENA) architecture delivers analog co-processing power optimised for complex computation and enabling energy-efficient performance for next-generation AI and HPC applications. Q.ANT operates its own Thin-Film Lithium Niobate (TFLN) chip pilot line in collaboration with the Institute for Microelectronics Stuttgart, IMS CHIPS, and is currently shipping its Native Processing Servers to selected partners. Q.ANT was founded by Michael Förtsch in 2018 and is headquartered in Stuttgart, Germany.
Location: Stuttgart, Germany
Type: Full‑time, hybrid (1–2 days remote work per week)
Level: Principal / Distinguished Engineer or Architect
The future of AI computing is light, not electrons. Q.ANT is building photonic processing systems that compute with light – delivering a scalable, energy‑efficient alternative to transistor‑based architectures for next‑generation AI and HPC applications.
\nAs Principal ASIC Architect – Photonic AI Processors, you will define the architecture of our digital processor that controls photonic integrated circuits for AI training and inference. Working with a third‑party ASIC implementation partner, you'll provide technical leadership to internal photonics, firmware, and system integration teams, translating cutting‑edge photonic requirements into a processor architecture optimized for high‑bandwidth, low‑latency control of our photonic computing platform.
\nWhat makes this role unique\n\nHigh complexity: Integrating processor architecture with novel photonic device control paradigms – an area with few industry precedents where you'll define how light‑based computing is orchestrated at the instruction level.\nStrategic freedom: Broad autonomy in selecting design methodologies, architectural approaches, and IP building blocks, constrained only by high‑level product and business goals.\nDecision authority: You define the technical direction for processor architecture, influence make/buy decisions on IP, and approve final architectural trade‑offs.\nInnovation mandate: Create novel architectural features that will become differentiating IP for the company – your designs will define how photonic processors operate.\nReal‑world impact: Your work directly enables technology already deployed in production at world‑leading institutions like the Leibniz Supercomputing Centre.\n\nYour impact & responsibilities\nWithin your first 18–24 months, you will:
\n\nDeliver a processor architecture optimized for high‑bandwidth, low‑latency control of photonic integrated circuits in AI training and inference systems that achieve up to 30x energy efficiency vs. conventional systems.\nEnsure the design meets aggressive performance, power, and integration goals to maintain competitive advantage in the rapidly scaling photonic computing market.\nOptimize architectural trade‑offs to reduce implementation cost and time‑to‑market without compromising performance.\nAchieve first‑silicon success through accurate modeling, verification strategy alignment, and close partner collaboration.\n\nKey responsibilities\n\nProvide technical leadership to internal photonics, firmware, and system integration teams, as well as to the external third‑party ASIC/processor design partner.\nDefine and manage processor architecture milestones, aligning with overall product roadmaps and photonic IC development timelines.\nAct as the primary technical interface between internal R&D, product management, and the external implementation partner to ensure requirements are fully translated into the processor design.\nGuide less experienced engineers in digital architecture and design principles relevant to photonic systems.\nIdentify architecture‑level risks early, coordinate mitigation plans, and elevate critical blockers to management.\nDefine complete processor architecture specifications within agreed timelines.\nIntegrate photonic‑specific control features seamlessly into the processor instruction set and memory hierarchy.\nBuild up and manage a team for future implementations.\n\nYour profile – our requirements\nEducation & experience\n\nMaster's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or related field; equivalent industry experience considered.\n15+ years of experience in high performance system design and integration, including processor‑based platforms.\nProven track record of first‑pass bring‑up success in complex, multi‑domain systems.\n10+ years of experience in processor or SoC architecture definition, with proven first‑silicon successes in high‑performance, low‑latency digital systems.\nProven track record of leading processor architecture projects from concept to silicon.\n\nDeep technical expertise in\n\nCPU and/or DSP microarchitecture design (pipelines, instruction set architecture, memory hierarchy).\nHigh‑speed digital interfaces and interconnects.\nHardware/software co‑design principles.\nLow‑power and performance optimization techniques.\nHardware description languages (VHDL, Verilog, SystemVerilog) and architecture modeling tools (SystemC, gem5, or equivalent).\nFamiliarity with AI acceleration architectures and associated compute/memory trade‑offs.\nExperience working with external ASIC implementation partners or foundries.\n\nLeadership & coordination skills\n\nExceptional ability to lead multidisciplinary engineering teams across processor design, photonics, firmware, and system integration domains.\nSkilled in resolving cross‑domain technical challenges in fast‑paced, resource‑constrained environments.\nStrong mentoring capability for senior technical staff.\nExcellent communication skills with ability to translate complex technical trade‑offs to management, product teams, and external partners.\n\nPreferred qualifications\n\nUnderstanding of photonic integrated circuits (PICs) and their control requirements.\nKnowledge of mixed-signal and analog/digital integration challenges.\nExperience with integrating novel hardware into AI training and inference pipelines.\nFamiliarity with domain‑specific architectures or accelerators beyond traditional general‑purpose processors.\nExperience defining processor architectures for emerging computing paradigms.\n\nWhy us?\nWhat we offer\n\nMake impact at scale: Help solve one of computing’s biggest challenges—making growing compute demand and sustainability go hand in hand.\nWork on the leading edge: Photonic AI acceleration technologies that will define the next decade of computing, already validated in production HPC environments.\nOwn your work from day one: Broad autonomy and decision authority with direct impact on product success and the future of AI infrastructure.\nFast‑track your growth: Work on challenges with few industry precedents—every solution becomes new institutional knowledge and potentially industry‑defining IP.\nWorld‑class team: Collaborate with a passionate, international, cross‑functional team of experts in photonics, processor design, and AI systems.\nDirect access to leadership: Work closely with the company’s founders, including CEO Dr. Michael Förtsch, and advisory board members who shaped the semiconductor industry (ARM, Intel, Infineon).\nCollaborative culture: Innovative work environment that values technical excellence, open communication, and pragmatic problem‑solving.\nBe part of history: Join at the inflection point where photonic computing transitions from research to mainstream—your contributions will shape this transformation.\n\nWhy now matters\nAI data centers are projected to consume 17% of US electricity by 2030. A single GPU now draws as much power as a kitchen oven. Traditional CMOS processors require 1,200 transistors for a simple 8‑bit multiplication—Q.ANT’s photonic chip does it with one optical element.
\nIn July 2025, the Leibniz Supercomputing Centre became the world’s first HPC facility to deploy photonic computing in production. This is no longer research—it’s real, it’s shipping, and it’s redefining what’s possible.
\nHow to apply\nWe’re looking for someone energized by the challenge of integrating cutting‑edge photonics with high‑speed digital systems—and who wants to see their work deployed in production systems already changing how the world computes.
\nReady to architect the future of AI computing?
\nWe look forward to receiving your application!
\nQ.ANT is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
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